Please use this identifier to cite or link to this item: http://repository.vnu.edu.vn/handle/VNU_123/27223
Title: Eliminated Common-Mode Voltage Pulsewidth Modulation to Reduce Output Current Ripple for Multilevel Inverters
Authors: Nguyen, Tam-Khanh Tu
Nguyen, Nho-Van
Prasad, Nadipuram (Ram) R.
Keywords: Multilevel Inverter;PWM inverters.;Pulse Width Modulation (PWM);Harmonic distortion;Current-ripple;Common-mode voltage
Issue Date: 2016
Publisher: H. : ĐHQGHN
Citation: ISIKNOWLEDGE
Abstract: The paper presents an analysis on the output current-ripple in zero Common Mode Voltage (ZCMV) PWM control of multilevel inverters. The modulation strategy for Common Mode Voltage (CMV) elimination in multilevel inverters is based on the “three zero common mode vectors” principle. The space vector diagram, which consists of vectors of zero common mode voltage, is fully explored by properly depicting the base voltage vectors and their corresponding active switching vectors. The switching patterns are limited to those of three switching states each of which is symmetrically distributed. Based on the PWM process simplified to that of a two-level inverter with three allowable switching states and the degree of freedom existing in the switching states arrangement, a novel carrier-based PWM method with optimized output current ripple is proposed. Compared to the existing PWM methods which utilize the same kind of switching patterns, the proposed PWM method has reduced considerably the RMS current ripple and total harmonic distortion (THD) of the output-current in a wide region of the modulation index. The effectiveness of the proposed method is validated by both simulation and experimental results.
Description: IEEE TRANSACTIONS ON POWER ELECTRONICS Volume: 31 Issue: 8 Pages: 5952-5966 ; TNS06414
URI: http://repository.vnu.edu.vn/handle/VNU_123/27223
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