Please use this identifier to cite or link to this item: http://repository.vnu.edu.vn/handle/VNU_123/55381
Title: Enhancement of Implementing Cryptographic Algorithm in FPGA built-in RFID Tag Using 128 bit AES and 233 bit kP Multitive Algorithm
Authors: Luc, Nhu Quynh
Dang, Vu Son
Mai, Anh Tuan
Keywords: Information safety;RFID;FPGA;AES;point multitive algorithm
Issue Date: 2017
Publisher: H. : ĐHQGHN
Series/Report no.: Vol. 33;No. 2 (2017)
Abstract: Cryptographic application plays an important role in wireless communication, especially, a FPGA built-in RFID tag on UHF band (860-960 MHz). The information safety can be obtained by applying suitable and advanced cryptographic algorithm. This paper simulates the installation and implementation of cryptographic algorithm on a FPGA using Isim software from Xilinx. The result shows that the implementation of 128-bit Advanced Encryption Standard-AES improved considerably the operating speed by 565000 ps for both encryption and decryption process. Similarly, the 233-bit multitive algorithm kP on elliptic curve also enhanced then operating speed at 467661900000 ps. Using above mentioned algorithm, the system maintains the security level meanwhile it does not require very high hardware configuration.
Description: p. 82-87
URI: http://repository.vnu.edu.vn/handle/VNU_123/55381
ISSN: 2588-1124
Appears in Collections:Mathematics and Physics

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