Browsing by Subject Power Amplifier

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  • Authors: Vu, Tuan Anh; Pham, Tuan Dinh; Bach, Duong Gia Bach (2017)

  • This paper presents high-efficiency high-gain 2.4 GHz power amplifiers (PAs) for wireless communications. Two class-B PAs are designed and verified in 0.13 µm CMOS mixed-signal/RF process provided by TSMC. The PAs employs cascode topologies with wideband multi-stage matchings. The single-stage cascode PA is designed for a high power added efficiency (PAE) of 35.4% while the gain is 20.4 dB over the -3 dB bandwidth between 2.4 GHz and 2.48 GHz. The two-stage cascode PA is targeted for a high gain of 37.7 dB while it exhibits a peak PAE of 24.1%. Supplied by 1.2 V supply voltages, the PAs consume DC powers of 4.5 mW and 9 mW, respectively.

Browsing by Subject Power Amplifier

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:  
Showing results 1 to 1 of 1
  • 151-12-623-2-10-20171011.pdf.jpg
  • Article


  • Authors: Vu, Tuan Anh; Pham, Tuan Dinh; Bach, Duong Gia Bach (2017)

  • This paper presents high-efficiency high-gain 2.4 GHz power amplifiers (PAs) for wireless communications. Two class-B PAs are designed and verified in 0.13 µm CMOS mixed-signal/RF process provided by TSMC. The PAs employs cascode topologies with wideband multi-stage matchings. The single-stage cascode PA is designed for a high power added efficiency (PAE) of 35.4% while the gain is 20.4 dB over the -3 dB bandwidth between 2.4 GHz and 2.48 GHz. The two-stage cascode PA is targeted for a high gain of 37.7 dB while it exhibits a peak PAE of 24.1%. Supplied by 1.2 V supply voltages, the PAs consume DC powers of 4.5 mW and 9 mW, respectively.